Slackware 14.1slackware-14.1

Mon Nov  4 17:08:47 UTC 2013
Slackware 14.1 x86_64 stable is released!

It's been another interesting release cycle here at Slackware bringing
new features like support for UEFI machines, updated compilers and
development tools, the switch from MySQL to MariaDB, and many more
improvements throughout the system.  Thanks to the team, the upstream
developers, the dedicated Slackware community, and everyone else who
pitched in to help make this release a reality.

The ISOs are off to be replicated, a 6 CD-ROM 32-bit set and a
dual-sided
32-bit/64-bit x86/x86_64 DVD.  Please consider supporting the Slackware
project by picking up a copy from store.slackware.com.  We're taking
pre-orders now, and offer a discount if you sign up for a subscription.

Have fun!  :-)

1 files changed, 201 insertions, 0 deletions

diff --git a/source/d/binutils/binutils.texinfo5.diff b/source/d/binutils/binutils.texinfo5.diff
new file mode 100644
index 000000000..b81529e04
--- /dev/null
+++ b/source/d/binutils/binutils.texinfo5.diff
@@ -0,0 +1,201 @@
+--- ./gas/doc/c-cr16.texi.orig	2013-02-27 14:28:03.000000000 -0600
++++ ./gas/doc/c-cr16.texi	2013-04-02 15:56:15.582205827 -0500
+@@ -44,26 +44,33 @@
+ CR16 target operand qualifiers and its size (in bits):
+ 
+ @table @samp
+-@item Immediate Operand
+-- s ---- 4 bits
+-@item
+-- m ---- 16 bits, for movb and movw instructions.
+-@item
+-- m ---- 20 bits, movd instructions.
+-@item
+-- l ---- 32 bits
+-
+-@item Absolute Operand
+-- s ---- Illegal specifier for this operand.
+-@item
+-- m ---- 20 bits, movd instructions.
+-
+-@item Displacement Operand
+-- s ---- 8 bits
+-@item
+-- m ---- 16 bits
+-@item
+-- l ---- 24 bits
++@item Immediate Operand: s
++4 bits.
++
++@item Immediate Operand: m
++16 bits, for movb and movw instructions.
++
++@item Immediate Operand: m
++20 bits, movd instructions.
++
++@item Immediate Operand: l
++32 bits.
++
++@item Absolute Operand: s
++Illegal specifier for this operand.
++
++@item Absolute Operand: m
++20 bits, movd instructions.
++
++@item Displacement Operand: s
++8 bits.
++
++@item Displacement Operand: m
++16 bits.
++
++@item Displacement Operand: l
++24 bits.
++
+ @end table
+ 
+ For example:
+--- ./gas/doc/c-arm.texi.orig	2013-02-27 14:28:03.000000000 -0600
++++ ./gas/doc/c-arm.texi	2013-04-02 15:56:15.582205827 -0500
+@@ -390,29 +390,29 @@
+ @code{unified} syntax, which can be selected via the @code{.syntax}
+ directive, and has the following main features:
+ 
+-@table @bullet
+-@item
++@table @code
++@item 1
+ Immediate operands do not require a @code{#} prefix.
+ 
+-@item
++@item 2
+ The @code{IT} instruction may appear, and if it does it is validated
+ against subsequent conditional affixes.  In ARM mode it does not
+ generate machine code, in THUMB mode it does.
+ 
+-@item
++@item 3
+ For ARM instructions the conditional affixes always appear at the end
+ of the instruction.  For THUMB instructions conditional affixes can be
+ used, but only inside the scope of an @code{IT} instruction.
+ 
+-@item
++@item 4
+ All of the instructions new to the V6T2 architecture (and later) are
+ available.  (Only a few such instructions can be written in the
+ @code{divided} syntax).
+ 
+-@item
++@item 5
+ The @code{.N} and @code{.W} suffixes are recognized and honored.
+ 
+-@item
++@item 6
+ All instructions set the flags if and only if they have an @code{s}
+ affix.
+ @end table
+@@ -451,28 +451,6 @@
+ @cindex register names, ARM
+ *TODO* Explain about ARM register naming, and the predefined names.
+ 
+-@node ARM-Neon-Alignment
+-@subsection NEON Alignment Specifiers
+-
+-@cindex alignment for NEON instructions
+-Some NEON load/store instructions allow an optional address
+-alignment qualifier.
+-The ARM documentation specifies that this is indicated by
+-@samp{@@ @var{align}}. However GAS already interprets
+-the @samp{@@} character as a "line comment" start,
+-so @samp{: @var{align}} is used instead.  For example:
+-
+-@smallexample
+-        vld1.8 @{q0@}, [r0, :128]
+-@end smallexample
+-
+-@node ARM Floating Point
+-@section Floating Point
+-
+-@cindex floating point, ARM (@sc{ieee})
+-@cindex ARM floating point (@sc{ieee})
+-The ARM family uses @sc{ieee} floating-point numbers.
+-
+ @node ARM-Relocations
+ @subsection ARM relocation generation
+ 
+@@ -519,6 +497,28 @@
+         MOVT r0, #:upper16:foo
+ @end smallexample
+ 
++@node ARM-Neon-Alignment
++@subsection NEON Alignment Specifiers
++
++@cindex alignment for NEON instructions
++Some NEON load/store instructions allow an optional address
++alignment qualifier.
++The ARM documentation specifies that this is indicated by
++@samp{@@ @var{align}}. However GAS already interprets
++the @samp{@@} character as a "line comment" start,
++so @samp{: @var{align}} is used instead.  For example:
++
++@smallexample
++        vld1.8 @{q0@}, [r0, :128]
++@end smallexample
++
++@node ARM Floating Point
++@section Floating Point
++
++@cindex floating point, ARM (@sc{ieee})
++@cindex ARM floating point (@sc{ieee})
++The ARM family uses @sc{ieee} floating-point numbers.
++
+ @node ARM Directives
+ @section ARM Machine Directives
+ 
+--- ./gas/doc/c-tic54x.texi.orig	2013-02-27 14:28:03.000000000 -0600
++++ ./gas/doc/c-tic54x.texi	2013-04-02 15:56:15.583205827 -0500
+@@ -109,7 +109,7 @@
+ is replaced with x.  At this point, x has already been encountered
+ and the substitution stops.
+ 
+-@smallexample @code
++@smallexample
+  .asg   "x",SYM1
+  .asg   "SYM1",SYM2
+  .asg   "SYM2",x
+@@ -126,14 +126,14 @@
+ ambiguous by placing colons on either side of the subsym.  The following
+ code:
+ 
+-@smallexample @code
++@smallexample
+  .eval  "10",x
+ LAB:X:  add     #x, a
+ @end smallexample
+ 
+ When assembled becomes:
+ 
+-@smallexample @code
++@smallexample
+ LAB10  add     #10, a
+ @end smallexample
+ 
+@@ -309,7 +309,7 @@
+ of a label or address.  For example, if an address @code{_label} resides
+ in extended program memory, the value of @code{_label} may be loaded as
+ follows:
+-@smallexample @code
++@smallexample
+  ldx     #_label,16,a    ; loads extended bits of _label
+  or      #_label,a       ; loads lower 16 bits of _label
+  bacc    a               ; full address is in accumulator A
+--- ./gas/doc/c-arc.texi.orig	2013-02-27 14:28:03.000000000 -0600
++++ ./gas/doc/c-arc.texi	2013-04-02 15:56:15.582205827 -0500
+@@ -220,7 +220,7 @@
+ encodings for use of these instructions according to the specification
+ by the user.  The parameters are:
+ 
+-@table @bullet
++@table @code
+ @item @var{name}
+ Name of the extension instruction
+